View source for Channel length modulation

[[Image:Mosfet saturation.svg|thumbnail|Cross section of a MOSFET operating in the saturation region]]
One of several short channel effects in [[MOSFET#MOSFET scaling|MOSFET]] scaling, '''channel length modulation''' ('''CLM''') is a shortening of the length of the inverted channel region with increase in drain bias for large drain biases. The result of CLM is an increase in current with drain bias and a reduction of output resistance.

To understand the effect, first the notion of '''pinch-off''' of the channel is introduced. The channel is formed by attraction of carriers to the gate, and the current drawn through the channel is nearly a constant independent of drain voltage in saturation mode. However, near the drain, the gate ''and drain'' '''jointly''' determine the electric field pattern. Instead of flowing in a channel, beyond the pinch-off point the carriers flow in a subsurface pattern made possible because the drain and the gate both control the current. In the figure at the right, the channel is indicated by a dashed line and becomes weaker as the drain is approached, leaving a gap of uninverted silicon between the end of the formed inversion layer and the drain (the ''pinch-off'' region).

As the drain voltage increases, its control over the current extends further toward the source, so the uninverted region expands toward the source, shortening the length of the channel region, the effect called ''channel-length modulation''. Because resistance is proportional to length, shortening the channel decreases its resistance, causing an increase in current with increase in drain bias for a [[MOSFET]] operating in saturation. The effect is more pronounced the shorter the source-to-drain separation, the deeper the drain junction, and the thicker the oxide insulator.

In the weak inversion region, the influence of the drain analogous to channel-length modulation leads to poorer device turn off behavior known as [[DIBL|drain-induced barrier lowering]], a drain induced lowering of threshold voltage.

In bipolar devices a similar increase in current is seen with increased collector voltage due to base-narrowing, known as the [[Early effect]]. The similarity in effect upon the current has led to use of the term "Early effect" for MOSFETs as well, as an alternative name for "channel-length modulation".

==Shichman–Hodges model {{anchors|Shichman-Hodges model|Shichman–Hodges model|Shichman-Hodges|Shichman–Hodges}}==
In textbooks, channel length modulation in [[MOSFET#Modes of operation|active mode]] usually is described using the Shichman–Hodges model, accurate only for old technology:<ref>[http://www.nanodottek.com/NDT14_08_2007.pdf  NanoDotTek Report NDT14-08-2007, 12 August 2007]</ref><ref name=Sansen>
{{Cite book
|author=W. M. C. Sansen
|title=Analog Design Essentials
|year= 2006
|publisher=Springer
|location=Dordrecht
|isbn=0-387-25746-2
|url=http://worldcat.org/isbn/0387257462
|pages=§0124, p. 13}}
</ref>

:: <math>I_{D}=K'_n\begin{matrix}\frac{W}{L}\end{matrix}(V_{GS}-V_{th})^2(1+\lambda V_{DS})</math>

where <math>I_D</math> = drain current, <math> K'_n </math> =
technology parameter sometimes called the transconductance coefficient, ''W ,L'' = MOSFET width and length, <math>V_{GS}</math> = gate-to-source voltage, <math>V_{th}</math> =[[threshold voltage]], <math>V_{DS}</math> = drain-to-source voltage and λ = '''channel-length modulation''' parameter. The threshold voltage ''V<sub>th</sub>'' in this formula is subject to [[DIBL|drain-induced barrier lowering]], and accurate results require [[SPICE#Device models|computer models]].

==Output resistance==
Channel-length modulation is important because it decides the MOSFET [[output resistance]], an important parameter in circuit design of [[current mirror]]s and [[amplifiers]].
In the Shichman–Hodges model used above, output resistance is given as:

::<math>r_O = \begin{matrix} \frac {1+\lambda V_{DS}}{\lambda I_D} \end{matrix} =\begin{matrix} \frac {1/\lambda +V_{DS}} {I_D} \end{matrix}=\begin{matrix} \frac {V_E L +V_{DS}} {I_D} \end{matrix}</math>,

where <math>V_{DS}</math> = drain-to-source voltage, <math>I_D</math> = drain current and <math>\lambda</math> = channel-length modulation parameter. Without channel-length modulation (for λ = 0), the output resistance is infinite. The channel-length modulation parameter usually is taken to be inversely proportional to MOSFET channel length ''L'', as shown in the last form above for ''r<sub>O</sub>'':<ref name=Sansen/>

::<math>\lambda </math> ≈ <math>\begin{matrix}\frac {\Delta L} {V_EL} \end{matrix}</math>,

where V<sub>E</sub> = is a fitting parameter, although it is similar in concept to the [[Early effect|Early Voltage]] for BJTs.  For a [[65nm|65 nm process]], roughly V<sub>E</sub> ≈ 4 V/μm.<ref name=Sansen/> (A more elaborate approach is used in the EKV model.<ref name=Fjeldly>
{{Cite book
|author= Trond Ytterdal, Yuhua Cheng, Tor A. Fjeldly
|title=Device Modeling for Analog and RF CMOS Circuit Design
|year= 2003
|page=212
|publisher=Wiley
|location=New York
|isbn=0471498696
|url=http://books.google.com/books?id=aMUBiiFJYtQC&pg=PA212&dq=%22channel+length+modulation%22&as_brr=0&sig=yNvT90etEzmJc8hqVkaUT8U-z-A}}
</ref>). However, no simple formula used for λ to date provides accurate length or voltage dependence of ''r<sub>O</sub>'' for modern devices, forcing use of computer models, as discussed briefly next.

The effect of channel-length modulation upon the MOSFET output resistance varies both with the device, particularly its channel length, and with the applied bias. The main factor affecting the output resistance in longer MOSFETs is channel length modulation as just described. In shorter MOSFETs additional factors arise such as: [[DIBL|drain-induced barrier lowering]] (which lowers the threshold voltage, increasing the current and decreasing the output resistance), [[velocity saturation]] (which tends to limit the increase in channel current with drain voltage, thereby increasing the output resistance) and [[ballistic transport]] (which modifies the collection of current by the drain, and modifies [[DIBL|drain-induced barrier lowering]] so as to increase supply of carriers to the pinch-off region, increasing the current and decreasing the output resistance). Again, accurate results require [[SPICE#Device models|computer models]].

==References and notes==
<references/>

==See also==
*[[Threshold voltage]]
*[[Short channel effect]]
*[[DIBL|Drain-induced barrier lowering]]
*[[MOSFET#MOSFET structure and channel formation|MOSFET operation]]
*[[Hybrid-pi model]]
*[[Transistor models]]
{{Use dmy dates|date=September 2010}}

{{DEFAULTSORT:Channel Length Modulation}}
[[Category:Electronic design]]
[[Category:2Fix]]