Difference between revisions of "Frequency synthesizer"

Latest revision as of 13:51, 10 December 2011

A frequency synthesizer is an electronic system for generating any of a range of frequencies from a single fixed timebase or oscillator. They are found in many modern devices, including radio receivers, mobile telephones, radiotelephones, walkie-talkies, CB radios, satellite receivers, GPS systems, etc. A frequency synthesizer can combine frequency multiplication, frequency division, and frequency mixing (the frequency mixing process generates sum and difference frequencies) operations to produce the desired output signal.

Types

Three types of synthesizer can be distinguished. The first and second type are routinely found as stand-alone architecture: Direct Analog Synthesis (also called a mix-filter-divide architecture^[1] as found in the 1960s HP 5100A) and by comparison the more modern Direct Digital Synthesizer (DDS) (Table-Look-Up). The third type are routinely used as communication system IC building-blocks: indirect digital (PLL) synthesizers including integer-N and fractional-N.^[2]

Digiphase Synthesizer

It is in some ways similar to a DDS, but it has architectural differences. One of its big advantages is to allow a much finer resolution than other types of synthesizers with a given reference frequency.^[3]

History

Prior to widespread use of synthesizers, radio and television receivers relied on manual tuning of a local oscillator, such as with the turret tuner commonly used in television receivers prior to the 1980s. Variations in temperature and aging of components caused frequency drift. Automatic frequency control (AFC) solves some of the drift problem, but manual retuning was often necessary. Since transmitter frequencies are well known and very stable, an accurate means of generating fixed, stable frequencies would solve the problem.

A simple and effective solution employs the use of many stable resonators or oscillators, one for each tuning frequency. Quartz crystals offer good stability and are often used for this purpose. This "brute force" technique is practical when only a handful of frequencies are required, but quickly becomes costly and impractical in many applications. For example, the FM radio band in many countries supports 100 individual frequencies from about 88 MHz to 108 MHz. Cable television can support even more frequencies or channels over a much wider band. A large number of crystals increases cost and requires greater space.

Many coherent and incoherent techniques have been devised over the years. Some approaches include phase locked loops, double mix, triple mix, harmonic, double mix divide, and direct digital synthesis (DDS). The choice of approach depends on several factors, such as cost, complexity, frequency step size, switching rate, phase noise, and spurious output.

Coherent techniques generate frequencies derived from a single, stable master oscillator. In most applications, crystal oscillator are common, but other resonators and frequency sources can be used. Incoherent techniques derive frequencies from a set of several stable oscillators.^[4] The vast majority of synthesizers in commercial applications use coherent techniques due to simplicity and low cost.

Synthesizers used in commercial radio receivers are largely based on phase-locked loops or PLLs. Many types of frequency synthesiser are available as integrated circuits, reducing cost and size. High end receivers and electronic test equipment use more sophisticated techniques, often in combination.

System analysis and design

A well-thought-out design procedure is considered to be the first significant step to a successful synthesizer project.^[5] In the system design of a frequency synthesizer, states Manassewitsch, there are as many "best" design procedures as there are experienced synthesizer designers.^[5] System analysis of a frequency synthesizer involves output frequency range (or frequency bandwidth or tuning range), frequency increments (or resolution or frequency tuning), frequency stability (or phase stability, compare spurious outputs), phase noise performance (e.g., spectral purity), switching time (compare settling time and rise time), and size, power consumption, and cost.^[6][7] James A. Crawford says that these are mutually contradictive requirements^[7]

Trial-and-error superseded by calculation and control theory

The trial and error method was once the work-horse for designers of frequency synthesizers^[8].

This began to change with the works of Floyd M. Gardner (his 1966 Phaselock techniques)^[9] and Venceslav F. Kroupa (his 1973 Frequency Synthesis)^[8]. Manassewitsch calls this the Brute-force approach.^[4] Techniques and formulae have been provided by Dean Banerjee^[10].

Gearbox approach

Surprisingly sophisticated mathematical techniques analogous to mechanical gear ratio relationships can be employed in frequency synthesis when the frequency synthesis factor is composed of multiplicative integers in the numerator and denominator.^[8] This method allows for effective planning of distribution and suppression of spectral spurs.

Modulo-N approach

Variable frequency synthesizers including DDS are routinely designed using this method.

Principle of PLL synthesizers

See main article: Phase-locked loop

A phase locked loop is a feedback control system. It compares the phases of two input signals and produces an error signal that is proportional to the difference between their phases.^[11] The error signal is then low pass filtered and used to drive a voltage-controlled oscillator (VCO) which creates an output frequency. The output frequency is fed through a frequency divider back to the input of the system, producing a negative feedback loop. If the output frequency drifts, the phase error signal will increase, driving the frequency in the opposite direction so as to reduce the error. Thus the output is locked to the frequency at the other input. This other input is called the reference and is usually derived from a crystal oscillator, which is very stable in frequency. The block diagram below shows the basic elements and arrangement of a PLL based frequency synthesizer.

The key to the ability of a frequency synthesizer to generate multiple frequencies is the divider placed between the output and the feedback input. This is usually in the form of a digital counter, with the output signal acting as a clock signal. The counter is preset to some initial count value, and counts down at each cycle of the clock signal. When it reaches zero, the counter output changes state and the count value is reloaded. This circuit is straightforward to implement using flip-flops, and because it is digital in nature, is very easy to interface to other digital components or a microprocessor. This allows the frequency output by the synthesizer to be easily controlled by a digital system.

Example

Suppose the reference signal is 100 kHz, and the divider can be preset to any value between 1 and 100. The error signal produced by the comparator will only be zero when the output of the divider is also 100 kHz. For this to be the case, the VCO must run at a frequency which is 100 kHz x the divider count value. Thus it will produce an output of 100 kHz for a count of 1, 200 kHz for a count of 2, 1 MHz for a count of 10 and so on. Note that only whole multiples of the reference frequency can be obtained with the simplest integer N dividers. Fractional N dividers are readily available ^[10].

Practical considerations

In practice this type of frequency synthesiser cannot operate over a very wide range of frequencies, because the comparator will have a limited bandwidth and may suffer from aliasing problems. This would lead to false locking situations, or an inability to lock at all. In addition, it is hard to make a high frequency VCO that operates over a very wide range. This is due to several factors, but the primary restriction is the limited capacitance range of varactor diodes. However, in most systems where a synthesiser is used, we are not after a huge range, but rather a finite number over some defined range, such as a number of radio channels in a specific band.

Many radio applications require frequencies that are higher than can be directly input to the digital counter. To overcome this, the entire counter could be constructed using high-speed logic such as ECL, or more commonly, using a fast initial division stage called a prescaler which reduces the frequency to a manageable level. Since the prescaler is part of the overall division ratio, a fixed prescaler can cause problems designing a system with narrow channel spacings - typically encountered in radio applications. This can be overcome using a dual-modulus prescaler.^[10]

Further practical aspects concern the amount of time the system can switch from channel to channel, time to lock when first switched on, and how much noise there is in the output. All of these are a function of the loop filter of the system, which is a low-pass filter placed between the output of the frequency comparator and the input of the VCO. Usually the output of a frequency comparator is in the form of short error pulses, but the input of the VCO must be a smooth noise-free DC voltage. (Any noise on this signal naturally causes frequency modulation of the VCO.). Heavy filtering will make the VCO slow to respond to changes, causing drift and slow response time, but light filtering will produce noise and other problems with harmonics. Thus the design of the filter is critical to the performance of the system and in fact the main area that a designer will concentrate on when building a synthesiser system.^[10]

See also

• superheterodyne receiver
• digitally controlled oscillator
• Dual-modulus prescaler

References

• Banerjee, Dean (2006), PLL Performance, Simulation and Design Handbook (4th ed.), National Semiconductor . Also PDF version.
• Crawford, James A. (1994), Frequency Synthesizer Design Handbook, Artech House, ISBN 0-89006-440-7 
• Egan, William F. (2000), Frequency Synthesis by Phase-lock (2nd ed.), John Wiley & Sons, ISBN 0-471-32104-4 
• Gardner, Floyd M. (1966), Phaselock Techniques, John Wiley and Sons 
• Kroupa, Venceslav F. (1999), Direct Digital Frequency Synthesizers, IEEE Press, ISBN 0-7803-3438-8 
• Kroupa, Venceslav F. (1973), Frequency Synthesis: Theory, Design & Applications, Griffin, ISBN 0-4705-0855-8 
• Manassewitsch, Vadim (1987), Frequency Synthesizers: Theory and Design (3rd ed.), John Wiley & Sons, ISBN 0-471-01116-9 
• Popiel-Gorski, Jerzy (1975), Frequency Synthesis: Techniques and Applications, IEEE Press, ISBN 0-87942-039-1 

Further reading

• Ulrich L. Rohde "Digital PLL Frequency Synthesizers - Theory and Design ", Prentice-Hall, Inc., Englewood Cliffs, NJ, January 1983
• Ulrich L. Rohde " Microwave and Wireless Synthesizers: Theory and Design ", John Wiley & Sons, August 1997, ISBN 0-471-52019-5

External links

• Hewlett-Packard 5100A (tunable, 0.01 Hz-resolution Direct Frequency Synthesizer introduced in 1964; to HP, direct synthesis meant PLL not used, while indirect meant a PLL was used)
• FREQUENCY SYNTHESIZER U.S. Patent 3,555,446, Braymer, N. B., (1971, January 12) ^[12]

es:Sintetizador de frecuencia ja:周波数シンセサイザ ru:Синтезатор частот

1. ↑ Popiel-Gorski (1975, p. 25)
2. ↑ Egan (2000, pp. 14–27)
3. ↑ Egan (2000, pp. 372–376)
4. ↑ ^{4.0 4.1} Manassewitsch (1987, p. 7)
5. ↑ ^{5.0 5.1} Manassewitsch (1987, p. 151)
6. ↑ Manassewitsch (1987, p. 51)
7. ↑ ^{7.0 7.1} Crawford (1994, p. 4)
8. ↑ ^{8.0 8.1 8.2} Kroupa (1999, p. 3)
9. ↑ Gardner (1966)
10. ↑ ^{10.0 10.1 10.2 10.3} Banerjee (2006)
11. ↑ Phase is the integral of frequency. Controling the phase will also control the frequency.
12. ↑ Egan, 2000, p. 372, 570